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Mano Basic Computer Simulator
Built by Ahmad Saad · 2025
Cycle-accurate CPU simulator of Mano's Basic Computer with full ISA support and a CLI debugger.

Overview
1 tool
The Mano Basic Computer Simulator is a cycle-accurate Python simulator of Mano's Basic Computer that Ahmad Saad wrote in 2025, with the full datapath, complete ISA support and micro-operation level control, plus a CLI debugger for stepwise execution and state inspection.
Problem
Mano's Basic Computer, from M. Morris Mano's Computer System Architecture, is the textbook machine many computer engineering students first learn processor design on: a 16-bit accumulator machine with 4096 words of memory, a small register set, and a common bus. On paper it is easy to follow one instruction. It is much harder to see how the control unit sequences micro-operations across many clock cycles, which is exactly where students get lost.
Approach
The simulator models the machine at the level the textbook teaches it, one micro-operation at a time, instead of interpreting instructions as black boxes. Each clock cycle advances the sequence counter, asserts the control signals for that timing step, and moves data across the bus between registers and memory. The result follows the datapath diagram step by step, which makes it useful for checking a hand-traced program.
Architecture
The simulator is written in Python and models the full datapath: the registers, memory, and common bus, plus micro-operation level control for the fetch, decode, and execute phases of each instruction. The full instruction set is supported: memory-reference instructions such as AND, ADD, LDA, STA, BUN, BSA, and ISZ, the register-reference instructions, and the input-output instructions.
A command-line debugger sits on top for stepwise execution and state inspection, so you can walk a program through the machine and see what each step changed.
Why cycle accuracy
An instruction-level interpreter would reach the same final register values, but it would hide the part the course is about. Modeling each timing step makes the extra cycles of indirect addressing and the order of register transfers visible, which is the difference between knowing what an instruction does and knowing how the hardware does it.
My role
I wrote the simulator and debugger myself. The source is public on GitHub.
Ahmad Saad is an AI engineer and Computer Engineering senior at the American University of Sharjah (AUS).